# Arm AGI server CPU architecture development

> Developing situation record from CLSTR: https://clstr.news/situations/arm-agi-server-cpu-architecture-development
> Updated: 2026-10-12T13:00:13.000Z. Sources: 30. Developments: 2.

Arm has disclosed technical specifications for its AGI server CPU architecture, marking a strategic transition toward providing production-ready server silicon. 

Initial details focused on the Neoverse V3 core, which features a 10-wide decode and dispatch capability and an estimated 19 execution ports. The architecture includes 8 ALUs, 3 branch units, 4 load/store units, and 4 floating-point units. It utilizes a dual 128-bit SIMD configuration for SVE2 processing and maintains a high L2 bandwidth of 128 bytes per cycle, though it does not appear to support Simultaneous Multithreading (SMT).

Subsequent information revealed a chiplet-based design rather than a monolithic structure. The processor consists of two compute chiplets manufactured by TSMC using the N3P process. In its largest commercial configuration, the system can activate up to 136 Neoverse-V3 cores, with each chiplet containing 35 compute tiles. The architecture is supported by 12 DDR5 memory channels and PCIe 6.0 lanes, with a thermal design power of 300W.

## Claims

- AMD introduced Helion, an open rack-scale blueprint for agentic AI infrastructure based on Open Compute Project specifications. (reported by 5 sources)
- The Helion CPU-only configuration can support up to 32,768 Zen 6 EPYC cores per rack. (reported by 5 sources)
- Intel unveiled its GPU D-series, code-named Crescent Island, designed for AI inference and agentic AI workloads. (reported by 5 sources)
- The Intel GPU D-series can feature up to 480 GB of LPDDR5X memory and provides 1.3 petaflops of FP8 compute. (reported by 3 sources)
- The Ryzen AI Halo developer platform features the Ryzen AI Max+ PRO 495 processor and up to 192GB of unified memory. (reported by 3 sources)
- The Enterprise configuration of Helion can integrate up to 16 AMD Instinct MI350P GPUs, delivering 74 petaflops of FP4 compute. (reported by 2 sources)
- Intel's new Xeon-based rack designs can scale to over 46,000 CPU cores per rack. (reported by 2 sources)
- NVIDIA announced the opening of its Vera Rubin rack and compute tray designs at the OCP Global Summit. (reported by 1 source)

## Timeline

### 2026-10-12: AMD and Intel unveil new AI infrastructure and rack designs

AMD, Intel, and NVIDIA have unveiled new rack-scale architectures and specialized hardware, such as AMD Helion and Intel's D-series GPUs, to power the growing demands of agentic AI and large-scale inference.

28 sources. https://clstr.news/cluster/arm-details-agi-server-cpu-chiplet-architecture

### 2026-10-05: Arm reveals technical details of AGI CPU and Neoverse V3

Technical specifications for Arm’s AGI CPU and Neoverse V3 core have been revealed, featuring 10-wide decode/dispatch and high-performance SIMD capabilities.

2 sources. https://clstr.news/cluster/arm-reveals-technical-details-of-agi-cpu-and-neoverse-v3

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Cite as: Arm AGI server CPU architecture development. CLSTR, https://clstr.news/situations/arm-agi-server-cpu-architecture-development