AI memory breakthroughs V-Die and SPHBM4 improve performance and cut costs

Researchers at South Korea’s UNIST and Japan’s University of Tokyo unveiled the V-Die memory concept, placing DRAM dies vertically and using liquid cooling to alleviate heat and bandwidth limits of traditional HBM. In GPT‑3‑scale workloads V-Die achieved 540 tokens per second, about 82 % faster than HBM4, reduced first‑token latency by roughly 32 % and kept stack temperatures near 45 °C.

The JEDEC semiconductor standards body released the SPHBM4 specification, a high‑bandwidth memory that slashes pin count by 75 % to 512 and raises per‑pin speed to 44 Gbps, preserving a theoretical bandwidth of up to 2.9 TB/s. By moving from expensive silicon interposers to standard organic substrates, SPHBM4 lowers packaging costs and eases supply‑chain constraints, a development seen as especially important for China’s AI‑chip industry.