Meta's Vistara bridge and CXMT DDR5 chips target memory shortage

A sharp rise in memory‑chip prices—up to 700 % since 2024—has created a severe shortage of DDR5 and high‑bandwidth memory (HBM) for AI data centers. Meta is responding with its own interconnect chip called Vistara, which uses Compute Express Link (CXL) 2.0 and PCIe 5.0 to let existing DDR4 DIMMs operate in servers built for DDR5. A prototype combines a 158‑core AMD EPYC processor with both DDR5‑6400 and DDR4‑2400 modules, demonstrating a practical bridge for legacy memory.

Meanwhile, China’s CXMT, seeking greater independence in the DRAM market, has introduced DDR5 DRAM ICs capable of running at up to 8 200 MT/s. The company released a 32‑GB kit (2 × 16 GB) that reaches 8 000 MT/s, marketed by Lexar and assembled by Gloway. CXMT now holds about 4‑8 % of the global DRAM share, positioning itself as a new competitor to Samsung, SK Hynix and Micron.

Both initiatives aim to mitigate the ongoing DRAM scarcity that is inflating costs for servers, gaming PCs and creative workstations, and to provide interim solutions while the market balances supply and demand.