NVIDIA plans to support RISC-V processors for its GPUs

NVIDIA has outlined a technical roadmap to enable RISC-V processors to function as host CPUs for its GPUs. This move aims to provide a third architecture option for accelerated servers, alongside the existing x86 and Arm platforms.

At the Hot Chips 2026 event, NVIDIA detailed how CUDA applications would split workloads between the CPU and GPU. In this model, compute-intensive functions are parallelized on the GPU, while the host CPU manages sequential code, system services, and non-accelerated components. To achieve integration, NVIDIA identified several technical requirements, including the RVA23 profile and the RISC-V Boot and Runtime Services specification.

Key technical components for this integration include hardware-managed PCIe coherence to prevent frequent cache invalidation during data transfers and peer-to-peer communication capabilities. Furthermore, NVIDIA discussed NVLink Fusion, which uses the NVLink C2C interface and CHI coherence to connect custom CPUs and accelerators through a unified memory architecture.