Qualcomm introduces High Bandwidth Compute to break AI memory wall

Qualcomm announced a new AI‑focused architecture called High Bandwidth Compute (HBC) aimed at eliminating the “memory wall” that limits modern AI systems. By placing the AI accelerator directly under a package of LPDDR memory and using vertical interconnects, HBC delivers up to six times the energy efficiency of HBM and more than 200 times the capacity of integrated SRAM. The design reduces heat generation and eliminates the need for costly silicon interposers.

The company also outlined its upcoming AI accelerator roadmap. The AI200, planned for launch this year, will use LPDDR5X and provide up to 43 TB of memory per rack. Its successor, AI250, will adopt the first‑generation HBC with bandwidth 18 times higher than AI200, while the later AI300 will incorporate a second‑generation HBC delivering bandwidth 54 times greater than the current AI200. Qualcomm says the modular HBC approach allows multiple memory modules to be integrated into a single device with standard chip‑packaging methods, promising lower cost and higher performance for data‑center AI workloads.