Samsung Electronics to use 2nm base die for HBM5, targeting 50% speed boost

Samsung Electronics announced that its Foundry division will apply a 2‑nanometre (2nm) base die to the next‑generation high‑bandwidth memory (HBM5). The new base die, built on a gate‑all‑around (GAA) structure, is expected to increase operating speed by more than 50 % compared with the previous HBM4E, while supporting higher‑density silicon‑through‑via (TSV) interconnects.

The move follows Samsung’s recent success with HBM4 and HBM4E, which used 4nm base dies and were adopted by major AI and high‑performance‑computing customers, including the AI6 chip for Tesla. Samsung’s executive Gu Ja‑hum said the 2nm base die will strengthen Samsung’s turnkey solution for AI, HPC, cloud and automotive markets, offering faster performance, lower power consumption and improved yield.

Production of the first‑generation 2nm process began in the second half of last year, with a second‑generation version targeting higher yield and performance slated for later this year.