Samsung Pursues Quantum Computing and 2nm Chips to Boost Semiconductor Yield

Samsung SDS, the group’s system‑integration arm, has joined Samsung’s internal semiconductor research to develop quantum‑computing algorithms for optical proximity correction (OPC). OPC predicts how extreme‑ultraviolet light will distort circuit patterns before they are etched onto wafers. As feature sizes approach 1 nm, the simulation requires handling dozens of variables simultaneously, slowing production and raising costs. The quantum‑hybrid approach will use a quantum processor for core simulations, a classical computer for post‑processing, and an AI layer to correct hardware errors. A proof‑of‑concept is slated for the second half of the year; the results will stay within Samsung’s semiconductor R&D, not be commercialized as a product. Successful OPC improvements could raise yield rates, a key competitive factor against industry leader TSMC.

At Samsung’s SAFE Forum, the company outlined its roadmap for future process nodes. The recent Exynos 2600, built on the 2 nm SF2 node, is followed by SF2P, which promises a 26 % power reduction and a 15 % speed increase, largely due to design‑technology co‑optimization (DTCO). Mass production of SF2P is expected in 2027‑28, with an AI‑focused SF2X node in development. Samsung also announced plans for a 1.4 nm generation (SF1.4) slated for 2029 mass production and a subsequent SF1.4+ node in 2030. These advances aim to keep Samsung competitive in the advanced‑node foundry market.