Samsung unveils memory roadmap featuring HBM5 and zHBM

Samsung has unveiled an updated memory market roadmap aimed at strengthening its position in the AI accelerator sector. Key highlights include the development of HBM5 and zHBM technologies.

According to the plan presented at SEMICON Taiwan, HBM5 is expected to double performance compared to its predecessors while providing 20% higher performance per watt and a 20% reduction in heat resistance. The HBM5 will utilize Samsung’s proprietary 2nm process node, with memory chip sandwiches potentially consisting of 12, 16, or 20 layers. Mass production is projected to begin around 2028.

Additionally, Samsung is developing zHBM, a unique solution that departs from the standard HBM concept by placing memory chips directly on top of the AI accelerator rather than adjacent to it. This architecture aims to shorten data paths, reduce latency, and increase efficiency. Samsung claims zHBM could offer up to eight times the raw performance of HBM4E chips with three times better performance-per-watt.