Semiconductor industry shifts lithography standards and production targets

Major semiconductor manufacturers, including TSMC, Intel, and Samsung Electronics, have announced a shift in industry standards for lithographic mask sizes. Moving away from the 6 × 6 inch standard used since the late 1970s, the industry will transition to 12 × 6 inch masks to enhance the capabilities of ASML’s High-NA EUV lithography machines. A pilot production line for these new masks is scheduled to launch in 2031.

In parallel, TSMC is significantly increasing its investment targets for advanced chip production. The company has raised its capacity goals for 2nm and 3nm processes to meet rising demand for AI and High-Performance Computing (HPC) chips. By the end of 2027, TSMC aims to produce 110,000 2nm wafers and 210,000 3nm wafers per month, representing a substantial increase over previous projections. These expansions are being implemented across facilities in Taiwan, Arizona, and Japan.