SK hynix unveils H-TPU architecture for SSD controllers

SK hynix has unveiled its H-TPU (Hynix Transaction Processing Unit), a specialized processor architecture designed to optimize SSD controllers. Presented at the ISOCC 2026 conference, the technology aims to address the power and area limitations of using general-purpose CPUs for repetitive storage tasks.

Unlike traditional controllers that rely on large, power-hungry Arm CPU cores to manage tasks like metadata management and I/O transmission, the H-TPU architecture distributes these workloads across approximately 100 small, programmable processing units. This approach utilizes a simplified four-stage pipeline optimized for sequential execution rather than complex out-of-order processing.

SK hynix claims that an individual H-TPU core consumes only about 2.5% of the power and occupies roughly 4% of the area required by a conventional general-purpose CPU core. By activating only the specific H-TPU needed for a given request, the system significantly reduces energy consumption. The company plans to integrate this technology into next-generation enterprise SSDs, its “Storage Next” AI-optimized architecture, and upcoming high-bandwidth flash products.