SmarCo GC3 chip targets video AI memory bottlenecks

Zhongke Tongliang has introduced the SmarCo GC3, described as the world’s first video intelligent AIGC chip based on a RISC-V dataflow architecture. The chip is designed to address the “memory wall” bottleneck common in traditional GPU architectures, where significant energy and time are wasted moving massive amounts of pixel data between memory and processing cores during video generation.

Unlike traditional control-flow architectures, the SmarCo GC3 utilizes a dynamic trigger mechanism based on data dependency. This allows computation to occur automatically as soon as required input data is available, minimizing unnecessary data movement. The chip features 200 TOPS (INT8) of AI computing power, a 128GB LPDDR5 unified memory pool with ECC error correction, and a 128-way 1080P hardware decoding engine to support seamless video generation workflows.

By combining dataflow architecture with the open RISC-V ecosystem, the chip aims to lower the barrier for developers to implement high-frequency operators like matrix multiplication in Transformer models. This approach seeks to provide a hardware foundation for continuous, long-duration video generation without the performance crashes associated with traditional GPU memory constraints.