TSMC targets 200,000 CoWoS units/month and 25,000 PIC wafers by 2028

Taiwan Semiconductor Manufacturing Company (TSMC) is accelerating expansion of its advanced packaging lines. The company plans to increase CoWoS (chip‑on‑wafer‑on‑substrate) output from about 30,000 units per month in 2024 to at least 200,000 units monthly by the end of 2027, with market forecasts suggesting a possible 240,000‑260,000 units by that date. Construction of new fab lines is proceeding on a 24‑hour shift schedule, though equipment orders remain unassigned and lead times of 7‑9 months could affect delivery.

In parallel, TSMC expects its photonic integrated‑circuit (PIC) capacity to rise sharply, from roughly 500 wafers a month today to 10,000 wafers by the second quarter of 2026, 15,000 wafers by late 2026, and at least 25,000 wafers monthly by 2028. Assuming 648 dies per wafer, the annual PIC die output could climb from about 4 million today to nearly 2 billion by 2028. Early PIC customers are expected to include Nvidia, Broadcom and AMD, with later adopters such as MediaTek and Ayar Labs. The expansion underpins broader AI‑optics integration, driving demand for associated test and assembly equipment.