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GlobalFoundries semiconductor technology and expansion

Updated 4 times since CLSTR started tracking revisions of this situation.

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2026-10-15 02:27 UTC → 2026-10-20 00:02 UTC · added removed

GlobalFoundries has announced is executing major semiconductor expansion plans in both the United States and Germany. Under a U.S.-Japan US-Japan trade agreement, and investment initiative, the company will has been selected to build and operate two new chip manufacturing facilities in Malta, New York. This project is expected to receive be financed by up to $21 billion in financing capital from Japan, with approximately $10 billion allocated to the Japan. The first 300mm facility, which requiring an initial $10 billion investment, is scheduled to begin construction in 2026 and start operations in 2029. This first facility plant is expected to add 900,000 300mm wafers to annual U.S. production capacity, while a capacity. A second facility may receive an additional $10 billion in funding. of similar scale is being considered, which could potentially add another 900,000 wafers annually. The expansion is projected to create approximately 27,000 construction and supply-chain jobs, alongside over 1,000 high-skilled manufacturing roles. As part of this the agreement, the U.S. government Department of Commerce will acquire an equity stake of approximately 4% in GlobalFoundries. In addition to the new facilities, the company will reallocate To support these efforts, $955 million from existing CHIPS Act funding will be reallocated toward silicon photonics, silicon germanium, and advanced packaging technologies at its the company’s New York and Vermont sites. Simultaneously, In Europe, the company is advancing its capacity in Dresden, Germany, capacity through its 1.1 the €1.1 billion euro SPRINT expansion project. This initiative aims to increase annual production capacity to over 1 million 300mm wafers by the end of 2028. The Dresden site will also host the development of the FDX Fusion platform, a next-generation FD-SOI technology designed for Physical AI applications, such as robotics and autonomous systems. Developed in collaboration with CEA-Leti and Soitec, the platform aims to deliver targets 7-nm class digital performance while integrating analog, RF, and memory functions on a single chip, with production targeted aimed for 2028.

Versions

  1. 2026-10-20 00:02 UTC GlobalFoundries semiconductor technology and expansion
  2. 2026-10-15 02:27 UTC GlobalFoundries semiconductor technology and expansion
  3. 2026-10-14 23:03 UTC GlobalFoundries semiconductor technology and expansion
  4. 2026-10-14 20:55 UTC GlobalFoundries semiconductor technology and expansion
  5. 2026-10-14 15:35 UTC GlobalFoundries semiconductor technology and expansion

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