Micron announces G11 3D NAND technology with over 400 layers

Micron has unveiled its next-generation G11 3D NAND technology, which features more than 400 layers. This new architecture aims to double the data density compared to the current G9 generation, potentially increasing density from 21 Gbit/mm² to approximately 42 Gbit/mm².

To achieve this, Micron is adopting a wafer-on-wafer bonding method. This process involves manufacturing memory cells and input/output control circuits on separate semiconductor wafers before joining them, allowing for optimized production processes for each component. This approach marks a departure from the previous CMOS under array method.

The G11 technology is expected to provide up to a 50 percent increase in input/output performance and a reduction in energy consumption per bit of more than 25 percent. Micron plans to begin mass production of this technology in the second half of 2027.