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2 clusters · 7 sources · 3 days · First seen · Last updated

Micron memory technology development roadmap

Overview

Micron has outlined its strategic direction for memory technology, prioritizing the scaling of existing DRAM designs and a transition to 3D DRAM over the 4F² architecture. Chief Technology and Products Officer Scott DeBoer stated that the 4F² approach was bypassed due to complexity and cost, noting that capacitor pitch remains a defining factor for DRAM scaling.

Regarding NAND technology, the company is accelerating its roadmap by skipping a generation to move from Gen 9 to Gen 11. This G11 3D-NAND technology utilizes a wafer-on-wafer bonding method, which involves manufacturing memory cells and I/O control circuits on separate wafers before joining them. This shift from the previous CMOS under array method is expected to provide twice the bit density, a 50 percent increase in I/O performance, and a reduction in energy consumption per bit of more than 25 percent. Micron plans to begin mass production of the G11 technology in the second half of 2027.

Entities

Micron · Scott DeBoer

Timeline

  1. [TECHNOLOGY] 2 sources
    Micron announces G11 3D NAND technology with over 400 layers

    Micron has announced its G11 3D NAND technology, featuring over 400 layers to double data density and improve energy efficiency, with mass production slated for late 2027.

  2. [TECHNOLOGY] 5 sources
    Micron announces DRAM scaling strategy and NAND roadmap

    Micron will skip 4F² DRAM in favor of 3D DRAM and is accelerating its NAND roadmap by jumping from Gen 9 to Gen 11.

Sources

bits-chips.nl · blocksandfiles.com · shiftdelete.net · tecnoandroid.it · teknoblog.com · tokenpost.com · whatever.scalzi.com