Samsung Electronics eyes 4nm and 2nm expansion for HBM and AI chips

Samsung Electronics is evaluating the construction of new 4nm and 2nm wafer production lines to meet surging demand for advanced semiconductor nodes. A primary driver is the evolution of High Bandwidth Memory (HBM). Future HBM4 and HBM4E generations will require 4nm processes for the base die to manage power consumption and heat, while HBM5 is expected to transition to 2nm nodes.

Samsung's 4nm capacity is currently under pressure, with approximately half of its production reportedly reserved for internal memory division needs to support HBM4 base dies. This creates competition with external AI chip customers such as NVIDIA and Groq. Additionally, the 2nm roadmap is critical for supplying Samsung's own Exynos flagship processors for Galaxy smartphones and fulfilling strategic orders from automotive leaders like Tesla.

The broader AI hardware ecosystem is also undergoing significant shifts. The industry is moving toward advanced packaging solutions like Chiplets and CoWoS to improve yields and reduce costs. As AI computing bottlenecks shift from raw processing power to memory bandwidth, the demand for HBM is projected to grow significantly. Furthermore, the industry is seeing a transition from air cooling to liquid cooling in high-end AI servers to manage increasing power densities, alongside upgrades in high-speed transmission components like PCBs and CCL materials.